Monte Cimone v2: Down the Road of RISC-V High-Performance Computers
By: Emanuele Venieri , Simone Manoni , Gabriele Ceccolini and more
Potential Business Impact:
Makes supercomputers faster using new chips.
Many RISC-V (RV) platforms and SoCs have been announced in recent years targeting the HPC sector, but only a few of them are commercially available and engineered to fit the HPC requirements. The Monte Cimone project targeted assessing their capabilities and maturity, aiming to make RISC-V a competitive choice when building a datacenter. Nowadays, Systems-on-chip (SoCs) featuring RV cores with vector extension, form factor and memory capacity suitable for HPC applications are available in the market, but it is unclear how compilers and open-source libraries can take advantage of its performance. In this paper, we describe the performance assessment of the upgrade of the Monte Cimone (MCv2) cluster with the Sophgo SG2042 processor on HPC workloads. Also adding an exploration of BLAS libraries optimization. The upgrade increases the attained node's performance by 127x on HPL DP FLOP/s and 69x on Stream Memory Bandwidth.
Similar Papers
Is RISC-V ready for High Performance Computing? An evaluation of the Sophon SG2044
Distributed, Parallel, and Cluster Computing
New computer chip makes supercomputers much faster.
Design and Implementation of a RISC-V SoC with Custom DSP Accelerators for Edge Computing
Hardware Architecture
Makes computer chips use less power.
V-Seek: Accelerating LLM Reasoning on Open-hardware Server-class RISC-V Platforms
Machine Learning (CS)
Makes smart computer programs run faster on new chips.