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A Single-Bit Redundancy Framework for Multi-Dimensional Parametric Constraints

Published: May 1, 2025 | arXiv ID: 2505.00869v1

By: Daniella Bar-Lev, Michael Shlizerman

Potential Business Impact:

Helps computers store more data in less space.

Business Areas:
Field-Programmable Gate Array (FPGA) Hardware

Constrained coding plays a key role in optimizing performance and mitigating errors in applications such as storage and communication, where specific constraints on codewords are required. While non-parametric constraints have been well-studied, parametric constraints, which depend on sequence length, have traditionally been tackled with ad hoc solutions. Recent advances have introduced unified methods for parametric constrained coding. This paper extends these approaches to multidimensional settings, generalizing an iterative framework to efficiently encode arrays subject to parametric constraints. We demonstrate the application of the method to existing and new constraints, highlighting its versatility and potential for advanced storage systems.

Country of Origin
🇺🇸 🇮🇱 United States, Israel

Page Count
6 pages

Category
Computer Science:
Information Theory