Score: 1
On Automating Proofs of Multiplier Adder Trees using the RTL Books
Published: July 25, 2025 |
arXiv ID: 2507.19010v1
By: Mayank Manjrekar
BigTech Affiliations:
ARM
Potential Business Impact:
Automates computer chip math checks.
Business Areas:
Field-Programmable Gate Array (FPGA)
Hardware
We present an experimental, verified clause processor ctv-cp that fits into the framework used at Arm for formal verification of arithmetic hardware designs. This largely automates the ACL2 proof development effort for integer multiplier modules that exist in designs ranging from floating-point division to matrix multiplication.
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Country of Origin
🇬🇧
United Kingdom
Page Count
5 pages
Category
Computer Science:
Logic in Computer Science