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Fast Polarisation-Aware Decoder for Non-Binary Polar Codes

Published: September 11, 2025 | arXiv ID: 2509.09554v1

By: Joseph Jabbour, Ali Chamas Al-Ghouwayel, Emmanuel Boutillon

Potential Business Impact:

Makes wireless signals faster and use less power.

Business Areas:
Field-Programmable Gate Array (FPGA) Hardware

The paper investigates the emerging field of low-complexity non-binary polar code (NB-PC) decoders. It shows that customizing each kernel of an NB-PC decoder through offline analysis can significantly reduce the overall decoding complexity. The proposed decoder, referred to as the Fast Successive Cancellation-Polarization Aware (FSC-PA) scheme, achieves this by minimizing the computational load of parity-check nodes that share the same level of input polarization. The NB polar decoder is developed for both BPSK and CCSK modulations. Compared to the state-of-the-art extended min-sum algorithm, the FSC-PA algorithm achieves an overall reduction of 60 percents in field additions and 30 percents in real additions, while incurring only a negligible performance loss (less than 0.2 dB degradation).

Country of Origin
🇫🇷 France

Page Count
8 pages

Category
Computer Science:
Information Theory